Plated wire memory

ABSTRACT

There is disclosed herein a quaternary alloy plating composition for a NDRO (non-destructive read-out) magnetic memory wire comprising by weight 77.3% Ni, 18.2% Fe, 3.5% Co, 1.0% P and substantially non-magnetostrictive.

States I ate t 1 DiGuilio [52] US. Cl. 29/l91.6; 29/196; 29/1963; 29/199; 340/174 PW; 75/170 [51] Int. Cl. 823p 3/00; G1 1c ll/02; C220 19/00 [58] Field of Search 204/12, 13, 28, 43 T, 43 P; 340/174 PW; 29/196, 196.3

[56] References Cited [UNITED STATES PATENTS 3,330,631 7/1967 Tsu 29/1835 June 3, 1975 3,354,059 11/1967 Koretzky 204/12 3,370,929 2/1968 Mathias 29/1835 3,549,507 12/1970 Semienko et a1. 204/28 Primary Examiner.lohn H. Mack Assistant Examiner-Aaron Weisstuch Attorney, Agent, or Firm-Rene A. Kuypers [57] ABSTRACT There is disclosed herein a quaternary alloy plating composition for a NDRO (non-destructive read'out) magnetic memory wire comprising by weight 77.3% Ni, 18.2% Fe, 3.5% Co, 1.0% P and substantially nonmagnetostrictive.

5 Claims, 5 Drawing Figures WATER RINSE i e SUBSTRATE ELECTRO COPPER ANNEALING CUT AND [REEL CLEANER PLATING it FURNACE PACKAGE N ACID MAGNETIC TEST WIRE PUSHI G ETCHANT PLATING ROLLERS SHEH 1 WATER RINSE I2 L IS 2o;I

111 Le E I I4 1 I4 I4 SUBSTRATE ELETRD- GoP ANNELING 0 AND REEL CLEANER PLAT FURNACE P AGE E PUSHING AcID MAGNETIC TEST OLLERS IIETCHANT PLATING SoLuTIoN IN II-DII IDEPoSITIoN ANoDE CONNECTION III-ELECTROCLEAN :1-BIAS II| I TESTER [30 '0 m it I I I I i Y -I IN :II@ I 0 I I CATHODE CONNECTION IDUT \n\ \NDRO INORD IIIIURRENT DRE ING I T OPERATING I I wINDow" BIT CURRENT SINGLE WRITE SWITCH CURVE IFoR THRESHOLD I/,,

DuTPuT IPRIGR ARTI IBIT CURRENT \WALL MOTION THRESHOLD PATENTEIJJUN3 \1915 3,887. 338

SHEET 2 w 1 w M ILATED WIRE MEMORY This is a division of application Ser. No. 375.266.

filed June 139. I973. now US. Pat. No. 3.853.717.

BACKGROUND OF THE INVENTION I. Field of the Invention This invention relates to the field of computer memories and in particular to the magnetic type that operates in the NDRO mode.

2. Description of the Prior Art The known pertinent prior art is contained in the IEEE Transactions on Magnetics. Vol. Mag-5. No. 4. December. I969. pp. 728-751 by J. S. Mathias and G. A. Fedde. and US. Pat. Nos. 3.370.929 and 3.549.507.

The recognized shortcoming of the known prior art plated wires has been their narrow operating margins. This means that the plated wires with such operating characteristics are able to withstand only limited current variations along the bit and Word lines. This is a serious shortcomingsince such wires are rejected during the manufacturing process and therefore the production yields are decreased and the unit cost increased. In other words. plated wires manufactured with limited operating margins make it difficult to compete in the marketplace and hence. are not viable memory devices.

The instant invention is designed to provide a NDRO plated wire memory element with a wider range of magnetic characteristics than exists in the prior art. In particular. the present invention provides wires having an increased wall motion threshold. Thewall motion threshold is the upper limit of bit current (current down the wire in the write mode) allowed in the operation of the plated wire. If the wall motion threshold is exceeded. information stored along the wire will be destroyed.

The present invention also is designed to provide a higher degree of uniformity along the length of the wire and a larger operating region so that better utilization of the wire can-be obtained. By uniformity is meant that the magnetic parameters of the wire have reduced variations along the length of the wire.

The gist of the invention is accordingly a new magnetic plating composition composed of nickel. iron. cobalt and phosphorus on a uniformly rough or spherular, hereinafter referred to as caviar intermediate layer. The caviar surface is formed on a smooth. mirror-like. ion-magnetic wire substrate.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a schematic representation of the plating )rocess utilized in the invention;

FIG. 2 depicts in schematic form the various currents tpplied during the plating process as well as a schenatic of the call arrangement which is utilized;

FIG. 3 is a view of a smooth. drawn wire as initially )rovided during the plating operation at 3.000 magnifi- .:ation wherein 3 millimeters thereon equal 1 micron FIG. 4 is a view of the uniformly rough or intermedilte surface plated upon the substrate shown in FIG. 3 it 3.000 magnification wherein 3 millimeters thereon :quals 1 micron; and I FIG. 5 depicts a simplified switching diagram of a bit ilong the plated wire provided by the present invention is well as for the prior art plated wire.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to FIG. 1 in greater detail. there is shown a reel 10 having several feet of wire substrate 11 wound around its circumference. The substrate 11 is made of non-magnetic material such as berylliumcopper or phosphor-bronze alloy on the order of about 2-5 mils in diameter. Prior to placing the substrate 11 on the reel 10, it may be electropolished in accordance with well established prior art practices to remove troublesome defects such as die marks, gouges and inclusions, refractory oxides, etc.

As the plater arrangement shown in FIG. I is placed in operation, the smooth substrate 11 is first electrocleaned at station 12 in order to remove grease, dirt and extraneous matter. Well established prior art materials and procedure are utilized during this step of the operation. The schematic shown in FIG. 2 indicates that during the electrocleaning step, current (see Table III) is supplied to the cell between the anode and cathode. The actual cell construction will be discussed in greater detail hereinafter. As is readily understood, the electrical current path is provided through the anode connection. the electrolyte. the substrate 11 to the cathode connection or ground. Following the electrocleaning operation, the substrate 11 is rinsed at station 14'. following which it is subjected to an acid etch at station 16 and further rinsed at station 14''. The acid etch is utilized to dissolve any residual metallic oxides still remaining on the substrate after the electroclean step.

Following electrocleaning, acid etch and water rinses, the substrate 11 is subjected to a copper plating operation at station 18. The purpose of the copper plating is to provide a uniformly rough (as opposed to a randomly rough) surface on the smooth wire substrate. This surface has been described as nodular or caviar and is shown in magnified form in FIG. 4. The nodular copper surface is typically plated to a thickness of approximately 5-l0.000 A. The copper can be deposited from a pyrophosphate copper solution. or preferably from a high-efficiency cyanide bath of the composition given in Table I.

It should be noted that the pH can be adjusted with KOH.

In the instant invention, the cyanide solution is preferred. Referring again to FIG. 2, there is shown in schematic form the electrical connection for the copper deposition step. The current parameters applied during this step of the operation are shown in Table III.

' After rinsing the substrate II at station 14'. the nodular covered wire is subjected to a magnetic plating process at station 20. Formulations for useful Permalloy electrolytes are given in Table II below.

TABLE ll Referring now to the plated wire switching diagram of FlG. 5, the bit current is shown as the abscissa and v fir the word current is shown as the ordinate. As is under- 5}, stood in the art. the bit current is the current applied 51. (g) lit-2.5 lg down the plated wire during a write cycle, whereas the Eggsfigfgfi: of Nuphhulcne 15 word current is applied to the strap positioned orthogo tri-sulfoiiic acid (g) nal to the plated wire. The word strap is energized at gi i l fifnic acid L 2 the same time as the plated wire is energized for a write pH 5t 23C E 5.0-3.0 2.4 Cycle, whereas the word strap alone is energized during Ratio Ni/F h 324x818 a read cycle. The single write switching threshold out- ?glgfll (5) 0 put is the locus of coincident word and bit currents Substrate diametertm lsl which are required to write so that a certain output level is achieved on reading with the same word cur- The film 1S dpoflted at l.thlckness f g rent. The upper limit of the word current shown on 4K. 7K The rehultmg magnenc film deposlle i t g 5 FIG. 5 is where the DRO (destructive read-out) is obuniformly rough surface would analyze by weight in the mined and is produced y exceeding the NDRO limit r F 8 2 8; g 18 k 2 232:5 of the wire. The upper limit of the bit current lS set by G Wu m 101.1 nonmdgn O f the wall motion threshold and is the level of bit current Nommagnetosmcnve wire an "f f i where the domain walls between oppositely magnetized f 'q i mlimufactureh z i 0 il 3 bits move along the wire under the influence of the bit n t e a t e f were i 6 1d field. Such wall motion will cause magnetization reverposmvle or j i f z his??? wou sal of some bits along the wire and loss of information. fg: fi C i I igl g s g 16 18 The operating margin for a write cycle is the difference d 3 1 i z z j S Pat NO 3 between the Bit Current Disturb Line (bit disturbance an u y IS 0 25 caused by the bit current alone) and the single write The cell disclosed therein is designed to maintain comthreshold Curve The p g point of the memory at posmimal umformlty and tinckngss along the 'epgth of any given level of word current must lie between these the wire and around the circumference at stations 18 limits The Operating window, in which the Operating and 20. In the present invention, the plating cell is 2-3 point y lie must also be located between the t o inches across, however, the length of the active plating 3O Curves inch It should be chamber lpproxlmately l 4 1 H In the prior art plated wire manufacture, the width of noted hereat that although fi magnegc p i the margin between the single write threshold and the shown in FIG. 1, several ce 5 may e utiize e Bit Current Disturb line has been rel v number of Cells used Is a function of the plating spaed This margin is shown as a difference be t sczii tl fs rifib r embodiment of 14 inches min.,

and m the prefefred I d art single write threshold curve (dotted line) and the two cells are unhzed at thg respecnw Stanons 8 Bit Current Disturb Therefore in the prior art these a aim to FIG 2 the bias Current is shown curves have not been sufficiently separated and the opfl h the i addition to the 616cm} crating window has been small. Accordingly. plated 0 mg r Osition and ma netic plating Cup wires made in accordance with the prior art technique C Copp? p g 40 have a low manufacturing yield because in many wires rents. The bias current is utilized to orient the magnetith t I h FIG q f the ma netic film circumferentially around 6 l Cur-Ten Operfnmg g 5 Own m f lb Zane? o smaller than that which is required for memory operathe wire. In this situation. the circumferential direction tion is known as the EASY axis direction. A direction 90 removed from the EASY direCtiOn i known as the Moreover. it has been the desire of those skilled in HARD direction During the Write Or read Cycle of the the art to make the limits of the single write threshold plate Wire memory, the magnetization is rotated to and the Bit Current Disturb further apart so that the resome angle less than 90. Suitable conditions for plating quired operating window becomes even larger. The inu on substrates are described in Table [II b l wstant invention has rovided a lar er window b effecp P g TABLE III 2V2 MlL WIRE 5 MIL WIRE Range Preferred Range Preferred Cleaner Current 800-2400 1600 400-l 200 800 tma/cm l Cleaner Temp. -70 50-70 C 60 Copper Current l60-l900 900 -1200 900 malcm Copper Temp. 25-45 35 25-45 35 l Cop er Flow 300-600 450 300-600 450 (Ml min) Permalloy Current For 8-l6ma l For 22-3oina 220 (ma/em per cell per cell Temp. 50-60 53 50-60 53 (C) Flow o00-l000 800 (-1000 800 (mlmin) Annealing Temp. 300-370 350 330-370 350 C) Wire Speed lZ-ZZ l4 i2-22 i4 (in/min) Bias Current 100-400 300 600-900 750 .5 tively moving the single write threshold curve further to the left tie, the solid curve line). This has opened up the margin between the two curves shown in FIG. 5 and as a result higher production yield is attained as well as better utilization of the wire. Thus. the wires made in accordance with the invention have larger operating margin so that they can withstand a greater variation in the circuitry connected to the word strap and' the bit line. in other words. even though the circuitry connected to the plated wire memory degrades due to age and as a result of other variables so that the operating point shifts. nevertheless the wire will continue to operate satisfactorily because of the greater operating window provided.

Another improvement obtained by the present invention has been the greater uniformity of magnetic properties along the length of the wire and may be appreciated by referring to FIG. 5. FIG. 5 depicts the magnetic properties of a single bit. it has been found that the magnetic characteristic of the bits along the wire have in general the same locus of points as the bit depicted. thereby providing a high degree of uniformity in terms of wire characteristics as a function of the bit position along the wire.

What is claimed is:

1. An improved plated wire memory device having a smooth non-magnetic wire substrate of the group consisting of beryllium-copper and phosphor bronze. a nodular intermediate layer of copper, the improvement comprising:

a. a magnetic film deposited upon said intermediate layer comprising by weight in the range of about l7-1 8% Fe, 25% Co and 05-20% P'and the balance essentially nickel.

b. whereby said memory is operative in the NDRO mode, and

c. said film being substantially non-magnetostrictive.

2. A plated wire memory device in accordance with claim 1 wherein said wire substrate has a diameter of about 2-10 mils.

3. A plated wire memory device in accordance with claim 1 wherein said magnetic film has a thickness of about 4K-7K A.

4. A plated wire memory device in accordance with claim 1 wherein said intermediate layer has a thickness of about 5,000l0 000 A.

5. A plated wire memory device in accordance with claim 1 wherein said magnetic film is deposited with a circumferential EASY axis. 

1. AN IMPROVED PLATED WIRE MEMORY DEVICE HAVING A SMOOTH NON-MAGNETIC WIRE SUBSTRATE OF THE GROUP CONSISTING OF BERYLLIUM-COPPER AND PHOSPHOR BRONZO, A NODULAR INTERMEDIATE LAYER OF COPPER, THE IMPROVEMENT COMPRISING: A. A MAGNETIC FILM DEPOSITED UPON SAID INTERMEDIATE LAYER COMPRISING BY WEIGHT IN THE RANGE OF ABOUT 17-18% FE, 2-5% CO AND 0.5-2.0% P AND THE BALANCE ESSENTIALLY NICKEL, B. WHEREBY SAID MEMORY IS OPERATIVE IN THE NDRO MODE, AND C. SAID FILM BEING SUBSTANTIALLY NON-MAGNETOSTRICTIVE.
 1. An improved plated wire memory device having a smooth non-magnetic wire substrate of the group consisting of beryllium-copper and phosphor bronze, a nodular intermediate layer of copper, the improvement comprising: a. a magnetic film deposited upon said intermediate layer comprising by weight in the range of about 17-18% Fe, 2-5% Co and 0.5-2.0% P and the balance essentially nickel, b. whereby said memory is operative in the NDRO mode, and c. said film being substantially non-magnetostrictive.
 2. A plated wire memory device in accordance with claim 1 wherein said wire substrate has a diameter of about 2-10 mils.
 3. A plated wire memory device in accordance with claim 1 wherein said magnetic film has a thickness of about 4K-7K A.
 4. A plated wire memory device in accordance with claim 1 wherein said intermediate layer has a thickness of about 5,000-10,000 A. 